31 Mar-2 Apr 2020 Caen, Normandy (France)

A very warm welcome to the 6th joint EUROSOI – ULIS 2020 Conference, in Caen.

This Conference aims at gathering together in an interactive forum all scientists and engineers working in the field of SOI technology and advanced nanoscale devices. One of the key objectives of the conference is to promote collaboration and partnership between different academia, research and industry players in the field. This year the joint EUROSOI-ULIS event will be hosted by the Normandy University (ENSICAEN, UNICAEN, ESIGELEC) in Caen, inside the William the Conqueror Castel, in the auditorium of Museum of Fine Arts.

            

         The call for paper can be dowloaded here.

The authors of the accepted contributions will be requested to provide a 4-page extended abstract which will be included in the conference proceedings (with IEEE technical sponsorship and ISBN index) and in the IEEE Xplore® digital library. Outstanding papers will be invited for publication in a special issue of Solid-State Electronics. A best paper award will be attributed by the SINANO institute. A best poster award will be attributed by ELSEVIER.

 

        Need help or information :  eurosoiulis2020@sciencesconf.org

                                                          Conference Chair: Bogdan Cretu

         Important dates :

             extended abstract submission deadline : January 13, 2020 January 30, 2020
             notification of acceptance :  February 3, 2020 February
10, 2020
             final paper submission: March 9, 2020 March 13, 2020                                       

 

The organizing committee invites scientists and engineers working on SOI technology and advanced nanoscale devices to actively participate by submitting high quality, original contributions.

Original 2-page abstracts with illustrations will be accepted for review in pdf format. The template is available here.

The authors of the accepted contributions will be requested to provide a 4-page extended abstract which will be included in the conference proceedings (with IEEE technical sponsorship and ISBN index) and in the IEEE Xplore® digital library. Outstanding papers will be invited for publication in a special issue of Solid-State Electronics. A best paper award will be attributed by the SINANO institute.

 

Papers in the following areas are solicited:

  • Advanced SOI materials and structures; physical mechanisms and innovative SOI-like devices.
  • New channel materials for CMOS: strained Si, strained SOI, SiGe, GeOI, III-V and high mobility materials on insulator; carbon nanotubes; graphene and other two-dimensional materials.
  • Properties of ultra-thin films and buried oxides, defects, interface quality; thin gate dielectrics: high-κ materials for switches and memory.
  • Nanometer scale devices: technology, characterization techniques and evaluation metrics for high performance, low power, reliability, high frequency and memory applications.
  • Alternative transistor architectures including FDSOI, Nanowire, FinFET, MuGFET, vertical MOSFET, FeFET and Tunnel FET, MEMS/NEMS, Beyond-CMOS nanoelectronic devices.
  • New functionalities in silicon-compatible nanostructures and innovative devices representing the More than Moore domain, nanoelectronic sensors, biosensor devices, energy harvesting devices, RF devices, imagers, etc.
  • CMOS scaling perspectives; device/circuit level performance evaluation; switches and memory scaling; three-dimensional integration of devices and circuits, heterogeneous integration.
  • Transport phenomena, compact modeling, device simulation, front- and back-end process simulation.
  • Advanced test structures and characterization techniques, parameter extraction, reliability and variability assessment techniques for new materials and novel devices.

 

Confirmed Plenary Talks Speakers

Mark Lundstrom (Purdue University, Indiana, USA)
          "Reflections on the Past, Present, and Future of Device Research"
Eddy Simoen (imec, Leuven, Belgium)
          "Horizontal, stacked or vertical silicon nanowires: does it matter from a low-frequency noise perspective?"
Jung-Hee Lee (Kyungpook National University, South Korea)
          "Fabrication and characterization of GaN-based nanostructure field-effect transistors (FETs)"
Cezar Zota (IBM Zurich, Switzerland)
          "Novel Electron Devices for the Quantum Era"
Sorin Cristoloveanu (IMEP Minatec, Grenoble, France)
          "The concept of electrostatic doping and related devices"

Sponsors:

American elements logo

American Elements: global manufacturer of advanced nanotubes, silicon, ceramics, graphene, and thin films for Nanoscale Devices

Murata 

Logo_Communaute_d_agglomeration_Caen_la_Mer.gif

Social events:

visit of the Mont Saint Michel and its abbey, one of the first UNESCO's " World Heritage sites " ; of the Bayeux Tapestry Museum, a UNESCO's "Memory of the World".

abbayeauxHommes

Online user: 1